1. Field of the Invention
This invention relates to signal processors and, more specifically, to digitally controlled programmable transversal filters using LSI GaAs integrated circuits.
2. Brief Description of the Prior Art
Many applications exist for communication receivers for use in aircraft wherein an interfering signal is present, such as one from an adversary or from oneself. It is necessary to define a device capable of operating at high frequencies (i.e., 100 to 400 megahertz) which can rapidly identify and remove such interfering signal. This is generally accomplished by means of a filter which can remove the unwanted signal or a filter which passes a wanted signal.
It is known that RF and analog functions are a major factor in the cost of such communications receivers for use in aircraft communications, navigation and identification (CNI) equipment. A cost effective approach to this problem involves the use of programmable filters. Programmability of the filter function is the basis for integrating several communications functions into a single piece of equipment. It is therefore necessary that programmable filters be developed which provide high performance, are efficient and are usable in a wide variety of systems.
Several prior art approaches have been developed to insert programmable filters into CNI systems. One such prior art system uses a GaAs CCD delay line with fixed tap weights. The center frequency of the filter is programmed by the clock frequency. Achievable sidelobe levels in such systems are limited by clock jitter. Dynamic range is limited both by finite signal handling capability of the CCD and by clock noise.
A second prior art approach uses a cascade of GaAs sample/hold devices as a tapped delay line and an array of fixed capacitors for tap weighting. Several capacitor arrays are included on a single chip to switch between lowpass, highpass and bandpass responses. Fourteen such chips must be cascaded to implement a useful CNI filter.
Both of the above described prior art approaches have been demonstrated as a narrow bandpass filter, but full tap weight programmability is required for an adaptive interference suppression application.
A third prior art approach utilizes a separate SAW delay line for each bit of tap weight programming accuracy. The signal from each delay line tap is switched between a positive and negative summing bus. There is a separate set of summing buses for each delay line. The buses are weighted using binarily scaled attenuators and summed so that the overall response is the superposition of the responses from the individual delay lines.
A fourth prior art approach takes advantage of the piezo-resistive effect by propagating a SAW through large FETs spanning the acoustic path. The SAW modulates the FET depletion regions.
A fifth prior art approach utilizes an acoustic charge transport (ACT) device which uses a CW surface wave to transfer packets of charge. The charge (RF signal) is injected into one half wavelength of the SAW (a localized depletion region) from an input (FET) electrode. The SAW carries the charge packet under any number of non-destructive sense electrodes which detect the presence of the charge. The SAW is used only as a conveyor belt.
A sixth prior art approach uses an array of voltage variable MOS capacitors for tap weight programming. The MOS capacitor array chip is mounted over the SAW device. The capacitor array is coupled to the SAW taps via a thin air gap. As a result, fabrication is extremely difficult.
A seventh prior art approach is the analog controlled programmable transversal filter (PTF) which is a well known and extremely versatile wideband signal processor. Such devices operate as bandpass, band-reject, adaptive or matched filters as discussed in a publication of C. M. Panasik et al., Proc. IEEE NAECON, pp. 1074-1080, June 1982.
In addition to the above, a hybrid programmable transversal filter has been described by D. E. Zimmerman et al.; Proc. IEEE MTTS, pp. 251-254, June 1985 and by C. M. Panasik et al.; Proc. IEEE Ultrasonics Symposium, October 1985 that employs a lithium niobate SAW delay line and two dual-gate FET arrays. This approach requires 64 external D/A converters for programming, making it impractical in a compact adaptive interference suppression system.